The Hardware Design of a High throughput CABAC Decoder for HEVC
نویسندگان
چکیده
منابع مشابه
Design and Implementation of a High-Throughput CABAC Hardware Accelerator for the HEVC Decoder
HEVC is the new video coding standard of the Joint Collaborative Team on Video Coding. As in its predecessor H.264/AVC, Context-based Adaptive Binary Arithmetic Coding (CABAC) is a throughput bottleneck. This paper presents a hardware acceleration approach for transform coefficient decoding, the most time consuming part of CABAC in HEVC. In addition to a baseline design, a pipelined architectur...
متن کاملDecoder Hardware Architecture for HEVC
This chapter provides an overview of the design challenges faced in the implementation of hardware HEVC decoders. These challenges can be attributed to the larger and diverse coding block sizes and transform sizes, the larger interpolation filter for motion compensation, the increased number of steps in intra prediction and the introduction of a new in-loop filter. Several solutions to address ...
متن کاملDesign of a High-Throughput CABAC Encoder
Context-based Adaptive Binary Arithmetic Coding (CABAC) is one of the algorithmic improvements that the H.264/AVC standard provides to enhance the compression ratio of video sequences. Compared with the context-based adaptive variable length coding (CAVLC), CABAC can obtain a better compression ratio at the price of higher computation complexity. In particular, the inherent data dependency and ...
متن کاملinvestigating the feasibility of a proposed model for geometric design of deployable arch structures
deployable scissor type structures are composed of the so-called scissor-like elements (sles), which are connected to each other at an intermediate point through a pivotal connection and allow them to be folded into a compact bundle for storage or transport. several sles are connected to each other in order to form units with regular polygonal plan views. the sides and radii of the polygons are...
Low-Cost and High-Throughput Hardware Design for the HEVC 16x16 2-D DCT Transform
This article presents the hardware design of the 16x16 2-D DCT used in the new video coding standard, the HEVC – High Efficiency Video Coding. The transforms stage is one of the innovations proposed by HEVC, since a variable size transforms stage is available (from 4x4 to 32x32), allowing the use of transforms with larger dimensions than used in previous standards. The presented design explores...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: The Journal of the Korean Institute of Information and Communication Engineering
سال: 2013
ISSN: 2234-4772
DOI: 10.6109/jkiice.2013.17.2.385